Spartan-3A/3AN FPGA Starter Kit Board Design Examples

Example designs created for the Spartan™-3A FPGA Starter Kit board and the Spartan-3AN FPGA Starter Kit board to demonstrate various features or capabilities.  Documentation and source files are included.

http://www.xilinx.com/products/boards/s3astarter/reference_designs.htm 

Evita™ HDL Tutorials

Aldec has created interactive VHDL and Verilog learning tools that have been used by thousands of engineers and students to quickly get familiar with HDL design concepts and languages’ syntax. The Evita^™ Tutorial is structured in the same way as traditional book: it is composed of chapters, sections and pages. Also, like in the books you can browse through the table of contents. The navigation buttons allow to easly switch to any section of the tutorial.

Working with Evita^™ you will discover that learning HDL can also be fun.

This innovative multimedia training is provided free of charge on Aldec website.

http://www.aldec.com/education/tutorials/

Core 3DES / DES (VHDL) en OpenCores.org

This is a VHDL implementation of Triple-DES (pipelined) and DES cryptographic algorithms, as recommended by NIST.

More details: http://www.opencores.org/projects.cgi/web/3des_vhdl/overview

Petalinux

PetaLinux is source-based hardware and software distribution which has been developed specifically for using Embedded Linux on reconfigurable logic devices. The PetaLinux distribution includes everything needed to easily create Linux systems running on Xilinx field programmable gate arrays (FPGAs).

PetaLinux is developed and maintained by PetaLogix. PetaLinux builds upon and extends the well-known uClinux-dist build environment that is maintained by SnapGear.

http://developer.petalogix.com/

time constraints

rodri, fijat si podes averiguar lo de las restricciones de tiempo xq no lo he podido hacer andar. Lo maximo que permite el ice el 1 ms pero de todas formas no funciona. Hasta ahora el mejor metodo sigue siendo el contador.